AMD EPYC 9375F socket: SP5

What the EPYC 9375F is

The EPYC 9375F is a 32-core, 64-thread frequency-optimized server processor that AMD released on October 10, 2024 with Turin. Zen 5 cores run at 3.8 GHz base with boost to 4.8 GHz and all-core boost at 4.4 GHz. Shared L3 cache totals 256 MB across eight compute dies of about 70.6 sq mm each. Default TDP is 320 W configurable between 320 and 400 W.

A note on clocks: AMD lists the base as 3.8 GHz while the database prints 3.85 GHz. This page follows AMD at 3.8 GHz with boost agreed at 4.8 GHz on both. The F suffix marks frequency-optimized bins for electronic design, virtual desktops and licensed databases where per-core speed decides throughput. Against the 16-core AMD EPYC 9175F the 9375F doubles threads at slightly lower clocks for mixed speed and density. Eight CCDs balance cache and cores for VDI hosts that serve many desktops per socket.

There is no integrated graphics and the multiplier is locked. ECC DDR5 RDIMMs carry correction. The 3.8 GHz base is the highest sustained clock in this batch beside the 9175F, which shows in long single-threaded runs. Desktop virtualization brokers often standardize on F SKUs because login storms depend on burst speed across many cores at once.

Socket and motherboard compatibility

The 9375F fits the SP5 socket in FC-LGA6096 packaging on 320 W-class server boards. Genoa boards accept it after a Turin-capable firmware update. The board maker CPU support list confirms the SKU with its minimum BIOS, and power delivery must cover the upper configurable bound.

One or two sockets are supported. Frequency-optimized hosts often run single-socket to simplify licensing, adding the second socket where thread count matters beside speed. Clean voltage regulation matters for clock stability, so qualified boards with strong power stages are worth choosing. VDI planners should validate login-storm performance on the exact board before buying racks of it.

Cooling qualification belongs early in planning at these clocks: sustained 3.8 GHz base operation assumes the vendor high-performance heatsink. Confirm the thermal solution per chassis before committing, especially in 1U bodies with restricted airflow.

Memory, PCIe and cooling

DDR5 up to 6400 MT/s in 12 channels with ECC RDIMMs reaches 6 TB per socket. Latency-sensitive workloads want fully populated channels with matched DIMMs, since consistent interleaving beats capacity for speed. The board memory guide sets 6400-capable selections. VDI hosts should size memory per desktop before ordering density, since frame buffers and application RAM grow with user counts. VDI hosts should size memory per desktop before ordering density.

PCIe 5.0 x128 lanes with CXL 2.0 attach NVMe, networking and accelerators directly to the CPU. Low-latency fabrics attach to CPU lanes for the shortest paths in trading and simulation clusters. Board manuals define slot wiring and sharing rules per chassis for accurate deployment planning.

Cooling at 320 W needs vendor-qualified high-performance air or liquid heatsinks with validated shrouds. No tray cooler ships. Dense chassis need careful qualification at this power with these clocks, so log sustained clocks under the real mix before production use.

Upgrade paths

Within SP5 the 9375F balances the 16-core AMD EPYC 9175F on speed against dense SKUs such as the AMD EPYC 9555 on threads, all on the same boards and memory. Buyers step here when 16 fast cores run out and 64 dense cores clock too low. Each move needs a BIOS check with matching cooling. Operators should re-benchmark VDI login performance after any move, since core count and clocks trade differently per desktop profile.

Moving to the 48-core AMD EPYC 9455 trades clocks for threads at lower power for denser VDI farms. Platform exits wait for later sockets with fresh memory qualification across the data hall.