AMD EPYC Embedded 9555P socket: SP5

What the AMD EPYC Embedded 9555P is

The AMD EPYC Embedded 9555P is the higher-clock 64-core single-socket member of the EPYC Embedded 9005 Turin stack on Socket SP5. It runs 128 threads at 3.2 GHz base with boost to 4.4 GHz, backed by 256 MB of L3 cache and a 360 W default TDP. AMD announced the Embedded 9005 series on March 11, 2025 with production shipments expected in the second quarter of 2025, building the Zen 5 chiplets on a 4 nm process with a 6 nm I/O die.

Sixty-four cores on one socket suit all-in-one virtualization hosts, storage heads and network appliances that must stay on a single board. Higher base clocks than the 9535 keep interactive threads responsive, while 128 threads cover consolidation. The 256 MB L3 pool keeps virtual machine working sets near the cores without extra socket hops.

Against the 48-core AMD EPYC Embedded 9455P below it, the 9555P adds 16 cores for denser single-board builds. Against the 96-core AMD EPYC Embedded 9655P above it, the 9555P keeps a lower 360 W class for standard air-cooled chassis. Single-socket validation and 7-year manufacturing support suit qualified carrier builds. See Socket vs chipset: what decides whether a CPU works for how socket, platform and firmware fit together on server boards.

Socket and motherboard compatibility

The 9555P fits Socket SP5, a 6,096-contact land grid array that AMD built for EPYC 9004 Genoa and EPYC 9005 Turin processors. Every board is single-socket only for this P model, so one 9555P fills the socket and there is no second-socket upgrade to plan. SP5 boards are platform designs rather than desktop chipsets, so memory lists, heatsink kits and firmware all come from the board vendor.

Turin shares SP5 packaging with Genoa, so many Genoa 1P boards take the 9555P after a BIOS update from the board maker at the same power class. A 9555P at 360 W needs power delivery and cooling rated for that class, which upper-midrange 1P Genoa boards already provide. Memory on an older board may stay at the Genoa qualified speed rather than reaching DDR5-6000, so the vendor memory list governs the exact result. Moving from any other socket is a full platform change with board, memory and heatsinks replaced together.

Memory, PCIe and cooling

Each SP5 socket feeds 12 DDR5 channels with ECC RDIMM or 3DS RDIMM modules, and AMD rates Turin to 6000 MT/s with 6400 MT/s in target configs for up to 6 TB per socket. Twelve channels keep 128 threads supplied in virtualization and storage mixes on a single board. Population order and maximum capacity vary by board, so the vendor memory list governs every build.

PCI Express connectivity is Gen 5 with x128 lanes per socket, plus x8 Gen 3 lanes for board devices and slower slots. That lane budget feeds NVMe arrays, high-speed networking and accelerators on a dense 1P node without lane sharing pressure. CXL 2.0 memory expansion is part of the Turin platform where the board wires it, and bifurcation follows board firmware, so architects confirm slot maps before committing to a consolidation layout.

Cooling follows the board vendor list rather than a retail box. SP5 uses server retention with heatsinks validated per TDP class, and the 9555P at 360 W needs a heatsink kit rated for that class in the intended chassis airflow. No cooler ships with the processor. Firmware power limits can cap draw below the default where a compact chassis demands it, at some cost in sustained clocks.

Upgrade paths

On the same socket, the path up from the 9555P starts with the 96-core AMD EPYC Embedded 9655P for more cores on SP5 single-socket boards where power and cooling allow. The dense-core AMD EPYC Embedded 9745 follows for throughput-first 1P racks. Each move keeps board and memory investments where the TDP class allows, plus a BIOS that already supports Turin.

The side move to the non-P AMD EPYC Embedded 9555 keeps the same cores and clocks with a dual-socket option for racks that outgrow one board. The step down to the 48-core AMD EPYC Embedded 9455P trims core count for license-sensitive sites. A move to AM5 entry servers is a different platform with 2 memory channels. That change replaces board, memory and cooling from scratch.