AMD EPYC 7402 socket: SP3
The AMD EPYC 7402 uses SP3, the LGA socket for EPYC server processors. The 24-core chip at 180 W pairs high base clocks with density.
AMD EPYC 7402 specifications
| Cores | 24 |
|---|---|
| Threads | 48 |
| Core architecture | Zen 2 (Rome) |
| Clocks | 2.8 GHz base, up to 3.35 GHz boost |
| Cache | 12 MB L2 plus 128 MB L3 |
| Default TDP | 180 W |
| Manufacturing process | TSMC 7 nm FinFET |
| Memory support | DDR4-3200 ECC, 8 channels |
| PCI Express | 128 PCIe Gen4 lanes per socket, up to 160 in 2P |
| Integrated graphics | None (BMC graphics on board) |
| Multiplier | Locked |
| ECC memory | Supported, DDR4 ECC RDIMM |
| Package | SP3 LGA4094 |
| Cooler in the box | None, server heatsink required |
Motherboard compatibility
AMD EPYC 7402 needs a motherboard with a SP3 socket. Chipset by chipset data for this codename is not recorded yet. See the SP3 chipset list and the board maker's CPU support list.
SP3 at a glance
| Type | LGA, 4,094 contacts |
|---|---|
| Package size | 58.5 × 75.4 mm |
| Introduced | June 2017 |
| Memory | DDR4 ECC RDIMM, 8 channels to DDR4-3200, up to 4 TB per socket |
| Cooler mounting holes | Board specific (server heatsink) |
What the EPYC 7402 is
The EPYC 7402 is a 24-core, 48-thread server processor from Rome. It launched in August 2019 as the high clock 24-core option with a 2.8 GHz base and up to 3.35 GHz boost at 180 W. Four chiplets share 128 MB of L3.
The 2.8 GHz base leads 24-core virtualization hosts for tenants that notice tail latency. Twelve megabytes of L2 back mixed server threads. The 180 W envelope needs high airflow chassis.
Dual socket scaling reaches 48 fast cores per box for mainstream clouds. The 7402 costs more per core than the efficient 7352 for lower latency. Its single socket twin 7402P serves the same clocks in 1P boards.
Socket and motherboard compatibility
The EPYC 7402 fits SP3 on single and dual socket boards with 180 W delivery. Heatsinked power stages hold sustained boost. Vendor lists confirm firmware revisions.
Mainstream dual socket pairs total 48 cores for cloud regions. Redundant power sizing follows the manual. The How to find your CPU socket type guide explains server sockets.
Milan 24-core parts later dropped into these boards with BIOS updates for IPC gains.
Memory, PCIe and cooling
Eight channels of DDR4-3200 ECC move data at up to 204.8 GB per sec. Full populations suit memory hungry VMs and analytics. ECC corrects errors during long uptimes.
PCIe Gen4 lanes total 128 per socket for NVMe and 100 Gb networking. Mainstream clouds attach flash pools without switches. Dual socket builds reach 160 lanes.
The 180 W heatsink class needs high flow 1U or relaxed 2U cooling. No boxed cooler exists. Cool inlets preserve boost best.
Where this Rome part fits
Twenty four fast cores fit virtualization, databases and build fleets needing latency plus density. High base clocks avoid the compromises of efficient dense parts. The 128 MB L3 absorbs shared working sets.
Cloud regions standardize on dual socket 7402 pairs with a terabyte of RAM. All channels filled matters for analytics throughput. The AMD EPYC 7352 trims power nearby for throughput billing.
Buyers confirm power delivery and firmware with the vendor before dense rollouts.
Upgrade paths
On SP3 density grows to 32-core 7502 parts on the same boards, or Milan 24-core SKUs for IPC. Memory and NVMe carry over.
SP5 Genoa servers bring DDR5 for next generation density. The CPU cooler compatibility by socket guide details cooling bands.
Frequently asked questions
What socket does the AMD EPYC 7402 use?
It uses SP3 on single and dual socket server boards.
How is the 7402 different from the 7352?
Higher 2.8 GHz base clocks at 180 W against 2.3 GHz at 155 W, with the same 24 cores.
Does the 7402 scale dual socket?
Yes. It runs one or two sockets.
What memory does the EPYC 7402 use?
DDR4-3200 ECC RDIMM in 8 channels.
What is the TDP of the EPYC 7402?
180 W with server cooling required.
When did the EPYC 7402 launch?
August 2019 with the Rome stack.
Sources and verification
Facts last checked against these sources on . Page last edited on .