AMD EPYC 7262 socket: SP3
The AMD EPYC 7262 uses SP3, the LGA socket for EPYC server processors. The 8-core high clock chip at 155 W suits licensed software.
AMD EPYC 7262 specifications
| Cores | 8 |
|---|---|
| Threads | 16 |
| Core architecture | Zen 2 (Rome) |
| Clocks | 3.2 GHz base, up to 3.4 GHz boost |
| Cache | 4 MB L2 plus 128 MB L3 |
| Default TDP | 155 W |
| Manufacturing process | TSMC 7 nm FinFET |
| Memory support | DDR4-3200 ECC, 8 channels |
| PCI Express | 128 PCIe Gen4 lanes per socket, up to 160 in 2P |
| Integrated graphics | None (BMC graphics on board) |
| Multiplier | Locked |
| ECC memory | Supported, DDR4 ECC RDIMM |
| Package | SP3 LGA4094 |
| Cooler in the box | None, server heatsink required |
Motherboard compatibility
AMD EPYC 7262 needs a motherboard with a SP3 socket. Chipset by chipset data for this codename is not recorded yet. See the SP3 chipset list and the board maker's CPU support list.
SP3 at a glance
| Type | LGA, 4,094 contacts |
|---|---|
| Package size | 58.5 × 75.4 mm |
| Introduced | June 2017 |
| Memory | DDR4 ECC RDIMM, 8 channels to DDR4-3200, up to 4 TB per socket |
| Cooler mounting holes | Board specific (server heatsink) |
What the EPYC 7262 is
The EPYC 7262 is an 8-core, 16-thread high frequency server processor from Rome. It launched in August 2019 for per core licensed databases with a 3.2 GHz base and up to 3.4 GHz boost at 155 W. Four chiplets feed 128 MB of L3, far more cache per core than entry SKUs.
Few very fast cores with huge cache beat many slower cores for Oracle style licensing. Four megabytes of L2 back the eight cores at high clocks. The 155 W rating reflects sustained boost rather than core count.
Dual socket scaling reaches 16 fast cores per box for licensed clusters. The chip costs more per core than dense parts, which pays back wherever licenses dominate budgets. Latency sensitive trading and telco workloads fit here.
Socket and motherboard compatibility
The EPYC 7262 fits SP3 on single and dual socket boards with 155 W delivery. Vendor lists must name the SKU. Rome firmware posts it natively.
High clock operation wants strong VRM cooling even at modest core counts. Dual socket boards double fast cores for licensed scale out. The How to find your CPU socket type guide covers server sockets.
Milan high frequency SKUs later offered similar roles on the same boards with BIOS updates.
Memory, PCIe and cooling
Eight channels of DDR4-3200 ECC feed eight cores with abundant bandwidth per thread. Low latency DIMM configurations help licensed databases most. ECC stays on for data integrity.
PCIe Gen4 lanes total 128 per socket for NVMe redo logs and fast NICs. Latency sensitive NICs attach directly to CPU lanes. Up to 160 lanes serve dual socket builds.
The 155 W band needs quality heatsinks with front to back airflow. Boost holds best with cool inlets. No boxed cooler exists.
Where this Rome part fits
Eight fast cores with 128 MB of L3 fit databases licensed per core, where fewer cores slash software bills. Clock speed and cache per core beat thread count for these deals. Telco control planes value the same profile.
Single socket database appliances and dual socket licensed clusters both use this SKU. Pair with low latency NVMe and 25 Gb networking. The AMD EPYC 7252 covers the same core count at lower clocks for less money.
Buyers should model license costs against silicon price before choosing dense alternatives.
Upgrade paths
On SP3 the high frequency path continues to Milan F SKUs with vendor firmware. Core growth to 7272 and beyond trades clocks for threads.
SP5 high clock Genoa parts serve later refreshes. The CPU cooler compatibility by socket guide details heatsink bands.
Frequently asked questions
What socket does the AMD EPYC 7262 use?
It uses SP3 on single and dual socket server boards.
Why choose 8 cores at 155 W?
High 3.2 GHz base clocks with 128 MB of L3 cut per core license costs for databases.
How much cache does the 7262 have?
4 MB of L2 plus 128 MB of L3.
Does the 7262 scale dual socket?
Yes. Non-P Rome parts run one or two sockets.
What is the TDP of the EPYC 7262?
155 W with server cooling required.
When did the EPYC 7262 launch?
August 2019 with the Rome family.
Sources and verification
Facts last checked against these sources on . Page last edited on .