AMD EPYC 7H12 socket: SP3
The AMD EPYC 7H12 uses SP3, the LGA socket for EPYC server processors. The 64-core HPC chip at 280 W needs liquid cooling.
AMD EPYC 7H12 specifications
| Cores | 64 |
|---|---|
| Threads | 128 |
| Core architecture | Zen 2 (Rome) |
| Clocks | 2.6 GHz base, up to 3.3 GHz boost |
| Cache | 32 MB L2 plus 256 MB L3 |
| Default TDP | 280 W |
| Manufacturing process | TSMC 7 nm FinFET |
| Memory support | DDR4-3200 ECC, 8 channels, up to 4 TB |
| PCI Express | 128 PCIe Gen4 lanes per socket, up to 160 in 2P |
| Integrated graphics | None (BMC graphics on board) |
| Multiplier | Locked |
| ECC memory | Supported, DDR4 ECC RDIMM |
| Package | SP3 LGA4094 |
| Cooler in the box | None, liquid cooling required |
Motherboard compatibility
AMD EPYC 7H12 needs a motherboard with a SP3 socket. Chipset by chipset data for this codename is not recorded yet. See the SP3 chipset list and the board maker's CPU support list.
SP3 at a glance
| Type | LGA, 4,094 contacts |
|---|---|
| Package size | 58.5 × 75.4 mm |
| Introduced | June 2017 |
| Memory | DDR4 ECC RDIMM, 8 channels to DDR4-3200, up to 4 TB per socket |
| Cooler mounting holes | Board specific (server heatsink) |
What the EPYC 7H12 is
The EPYC 7H12 is a 64-core, 128-thread HPC processor from Rome. AMD announced it on September 18, 2019 for liquid cooled supercomputers with a 2.6 GHz base and up to 3.3 GHz boost at 280 W. Eight top binned chiplets share 256 MB of L3.
The 2.6 GHz base leads all 64-core Rome parts for sustained LINPACK throughput. Atos BullSequana systems scored about 4.2 LINPACK TeraFLOPS per chip, roughly 11 percent past the 7742. Thirty two megabytes of L2 back massive parallel solvers.
Liquid cooling is mandatory at 280 W, which limits the chip to HPC chassis with cold plates. Air cooled data centers choose the 225 W 7742 instead. The 7H12 exists purely for supercomputing bids where every flop counts.
Socket and motherboard compatibility
The EPYC 7H12 fits SP3 on HPC boards with liquid cooling loops and 280 W power delivery. Vendor qualification is strictest at this thermal band. Rome firmware posts it natively.
Supercomputer blades pair dual 7H12 sockets with HDR fabrics for distributed LINPACK. Cold plate mounting follows the vendor manual exactly. The How to find your CPU socket type guide covers server sockets.
Standard enterprise SP3 boards lack the cooling for 280 W sustained, so board choice decides before silicon choice.
Memory, PCIe and cooling
Eight DDR4-3200 ECC channels per socket reach up to 4 TB for huge models. HPC nodes balance RAM per core for solver partitions. All channels filled matters at 64 cores.
PCIe Gen4 lanes total 128 per socket for HDR200 networking and NVMe scratch. Supercomputer fabrics attach directly to CPU lanes. Dual socket builds reach 160 lanes.
Liquid cold plates are required; air cooling cannot hold 280 W boost. Facility water temperatures decide sustained clocks. The large package torque sequence follows the manual.
Where this Rome part fits
Sixty four binned cores fit LINPACK bids, weather partitions and CFD clusters that buy flops. High sustained clocks beat dense efficient parts for time to solution. The 256 MB L3 keeps solver meshes on package.
National labs standardize on dual 7H12 blades with liquid loops. Power budgets run highest here per flop. The AMD EPYC 7742 covers the same cores with air cooling for enterprise rows.
Bid total cost with cooling plant before choosing liquid only flagships.
Upgrade paths
On SP3 there is no core upgrade past 64 cores; the path runs to Milan 7763 air cooled flagships with IPC gains. Fabrics and storage carry over.
SP5 Genoa HPC parts with DDR5 serve later supercomputer bids. The CPU cooler compatibility by socket guide details liquid cooling classes.
Frequently asked questions
What socket does the AMD EPYC 7H12 use?
It uses SP3 on liquid cooled HPC server boards.
Why does the 7H12 need liquid cooling?
Its 280 W envelope exceeds what air heatsinks hold at full boost, so cold plates are required.
How fast is the EPYC 7H12?
2.6 GHz base with up to 3.3 GHz boost across 64 cores.
When was the 7H12 announced?
September 18, 2019 for HPC customers.
What memory does the 7H12 use?
DDR4-3200 ECC RDIMM in 8 channels, up to 4 TB per socket.
Sources and verification
- 2nd Gen AMD EPYC momentum with new 7H12 processor (AMD press release)
- AMD EPYC 7H12 processor specifications (IT Creations)
Facts last checked against these sources on . Page last edited on .