AMD EPYC Embedded 9554 socket: SP5

What the EPYC Embedded 9554 is

The EPYC Embedded 9554 is the 64-core dual socket capable Genoa embedded part for SP5 in March 2023. Sixty-four Zen 4 cores with multithreading run at 3.1 GHz base and up to 3.75 GHz boost with matching all-core boost, backed by 64 MB of L2 and 256 MB of L3. Eight CCDs plus the IOD form the package on TSMC 5 nm with a 360 W default inside a 320 to 400 W window. It supports single and dual socket operation for scalable edge fabrics.

High density with high clocks suits consolidated edge clouds that pack VMs and functions into few nodes. Sixty-four cores share 256 MB of L3 for locality, while 12 DDR5-4800 ECC channels feed 6 TB per socket. One hundred twenty-eight Gen5 lanes per socket and up to 160 in 2P feed fabric, accelerators and NVMe. Power matches flagships for sustained all-core loads.

Buyers choose the non-P 9554 for socket flexibility where nodes may grow to 2P later. It matches the 9554P in clocks and cache but allows dual socket pairing. Smaller nodes stay with fewer cores on the same SP5 base. The Socket vs chipset: what decides whether a CPU works guide is secondary to board lists.

Socket and motherboard compatibility

The Embedded 9554 fits SP5 on single or dual socket embedded boards with LGA 6096 frames. Board lists must name Genoa Embedded 9004. Power delivery for 360 W per socket with cTDP options suits scalable edge chassis.

SP5 boards wire 12 DDR5 channels per socket with two DIMMs per channel for full capacity. BMC firmware covers cluster management. Confirm heatsink, PSU and airflow for 2P nodes that approach 720 W of CPU power.

Memory, PCIe and cooling

DDR5-4800 ECC RDIMM in 12 channels per socket to 6 TB feeds 64 cores per socket. Flexible populations support cost control. ECC stays enabled for edge uptime. Validated kits at rated speed are required.

PCIe Gen5 gives 128 lanes per socket and up to 160 in dual socket plus CXL. Typical 2P wiring feeds fabric, accelerators and NVMe arrays. Cooling needs SP5 server sinks for 360 W per socket with front-to-back flow.

Upgrade paths

On SP5 the upward move is the 96-core Embedded 9654 where density grows, or adding a second 9554 socket where boards allow 2P. Memory growth to 12 channels per socket and fabric additions often help more than cores. The 64-core point balances clocks and threads.

Outside SP5, Siena on SP6 lowers power for telco edge, while Genoa-X adds cache on SP5. Most Embedded 9554 owners scale sockets and IO first.