AMD EPYC 8635P socket: SP6

What the AMD EPYC 8635P is

The AMD EPYC 8635P is the flagship and top-core-count model of the EPYC 8005 Sorano stack on Socket SP6. It runs 168 threads at 1.6 GHz base with boost to 4.5 GHz, backed by 384 MB of L3 cache and a 225 W default TDP. AMD announced Sorano in February 2026 and launched the stack in May 2026, building it on full Zen 5 cores with a 5nm process, and Phoronix published review benchmarks of this model in June 2026.

Eighty-four cores in a single-socket edge envelope suit dense telco packet cores, software-defined storage clusters and consolidated virtualization hosts where thread count per node decides floor space and power budgets. The 384 MB L3 pool is the largest on SP6, which keeps cache-sensitive control paths and metadata work close to the cores while many tenants contend for data. At 225 W the part tops the SP6 power band, so chassis airflow and heatsink choice need the vendor qualified kit for that class.

Against the 64-core Siena predecessor, AMD cites about 40 percent higher top integer throughput with 20 more cores and far higher boost clocks. Against the 64-core 8535P below it, the 8635P adds 20 cores and 128 MB of L3 for 300 USD more at 1Ku, namely 5799 USD against 5499 USD. Buyers who need maximum per-node density on SP6 pick this model, while buyers who prize base clock or lower power look down the stack. The 8635P is the density choice for single-socket edge racks.

Socket and motherboard compatibility

The 8635P fits Socket SP6, a 4,844-contact land grid array that AMD built for EPYC 8004 Siena processors from 8 to 64 cores and EPYC 8005 Sorano processors from 8 to 84 cores. Boards come only in single-socket layouts, and AMD validates this model for 1P operation, so growth means adding nodes rather than filling a second socket. SP6 boards are platform designs rather than desktop chipsets, so memory lists, heatsink kits and firmware all come from the board vendor. See Socket vs chipset: what decides whether a CPU works for how socket, platform and firmware fit together on server boards.

Sorano is a drop-in replacement on Siena boards after a BIOS update, and Phoronix confirmed the swap on an AMD reference platform with a simple firmware upgrade. The 8635P at 225 W needs a board qualified for that power class, since Siena topped out at 200 W and some older boards stop below the new ceiling. Memory on a converted board may stay at the Siena qualified speed rather than reaching DDR5-6400. Moving from any other socket is a full platform change with board, memory and heatsinks replaced together.

Memory, PCIe and cooling

Each SP6 socket feeds 6 DDR5 channels with ECC RDIMM modules, and AMD rates Sorano to 6400 MT/s for up to 3 TB per socket. Six channels at these rates keep 168 threads supplied in packet processing and storage mixes that stream from memory all day. Population order, maximum capacity and per-board speed caps vary, so the vendor memory list governs every build. A Siena board converted to Sorano may hold memory at its older qualified speed, which trims bandwidth for the hungriest configurations.

PCI Express connectivity is Gen 5 with x96 lanes per socket, plus x8 Gen 3 lanes that carry board devices and slower slots. That lane budget feeds NVMe arrays, 400-gigabit class networking and accelerators on a single-socket board without the lane sharing compromises of smaller platforms. Lane bifurcation and CXL behavior follow board firmware, so architects confirm slot maps before committing to a storage-heavy layout. CXL 2.0 memory expansion is part of the Sorano platform where the board wires it.

Cooling follows the board vendor list rather than a retail box. SP6 uses server retention with heatsinks validated per TDP class, and the 8635P at 225 W needs the top-rated heatsink kit for the intended chassis airflow. No cooler ships with the processor. Firmware power limits can cap draw down toward 155 W where a chassis or power budget demands it, at some cost in sustained clocks.

Upgrade paths

On the same socket, the path from the 8635P goes down rather than up, since it already tops the SP6 stack. The 64-core 8535P and 48-core 8435P stay on SP6 boards for lower power or lower license cost where thread count allows. The 32-core 8325P and below serve clock-sensitive or small-footprint roles on the same single-socket board. Each of these moves keeps board, memory and heatsink investments where the TDP class allows, plus a BIOS that already supports Sorano.

A move to SP8 is a different platform with 8 memory channels, PCIe 6.0 and higher power classes, aimed at mainstream enterprise racks rather than compact edge nodes. That change replaces board, memory population and cooling design from scratch. Buyers coming from SP5 Turin systems face the same full-platform refresh. The decision turns on whether the workload needs SP6 efficiency per watt at the edge or mainstream rack density, and the answer differs for telco sites and for central data halls.