AMD EPYC 8025P socket: SP6

What the AMD EPYC 8025P is

The AMD EPYC 8025P is the 8-core entry model of the EPYC 8005 Sorano stack on Socket SP6. It runs 16 threads at 2.9 GHz base with boost to 4.5 GHz, backed by 64 MB of L3 cache and a 95 W default TDP. AMD announced Sorano in February 2026 and launched the stack in May 2026, building it on full Zen 5 cores with a 5nm process instead of the denser Zen 4c cores used in Siena.

Eight cores at these clocks suit small edge gateways, retail and factory controllers, and single-function storage nodes where chassis size and power draw decide the design. The 64 MB L3 pool keeps packet handling and metadata work close to the cores without reaching out to DRAM on every lookup. At 95 W the part fits the lower end of the SP6 power band, so compact short-depth chassis and quieter airflow profiles cover it.

Against the 16-core 8125P above it, the 8025P halves the core count for sites that pay per watt or per rack unit and run one steady workload. Against older 8-core Siena parts, it adds higher boost clocks to 4.5 GHz, DDR5-6400 support and the Zen 5 core. AMD lists the 1Ku price at 529 USD, which makes it the least expensive way onto a new Sorano board.

Socket and motherboard compatibility

The 8025P fits Socket SP6, a 4,844-contact land grid array that AMD built for EPYC 8004 Siena processors from 8 to 64 cores and EPYC 8005 Sorano processors from 8 to 84 cores. Every board is single-socket only, so one 8025P fills the socket and there is no second-socket upgrade to plan. SP6 boards are platform designs rather than desktop chipsets, so memory lists, heatsink kits and firmware all come from the board vendor. See Socket vs chipset: what decides whether a CPU works for how socket, platform and firmware fit together on server boards.

Sorano is a drop-in replacement on Siena boards after a BIOS update from the board maker, at the same power class. An 8025P at 95 W sits inside the power envelope that Siena boards were already built for, which keeps the swap simple where the vendor lists Sorano support. Memory on an older board may stay at the Siena qualified speed rather than reaching DDR5-6400, so the vendor memory list governs the exact result. Moving from any other socket is a full platform change with board, memory and heatsinks replaced together.

Memory, PCIe and cooling

Each SP6 socket feeds 6 DDR5 channels with ECC RDIMM modules, and AMD rates Sorano to 6400 MT/s for up to 3 TB per socket. Six channels at these rates keep 16 threads well supplied in gateway, firewall and light virtualization mixes. Population order and maximum capacity vary by board, so the vendor memory list governs every build. Boards that started life on Siena may top out at lower speeds until the vendor requalifies them for Sorano DIMM speeds.

PCI Express connectivity is Gen 5 with x96 lanes per socket, plus x8 Gen 3 lanes that carry board devices and slower slots. That lane budget feeds NVMe storage, 25 and 100-gigabit networking and timing cards on a single-socket edge board without lane sharing pressure. Lane bifurcation and CXL behavior follow board firmware, so architects confirm slot maps before committing to a storage-heavy layout. CXL 2.0 memory expansion is part of the Sorano platform where the board wires it.

Cooling follows the board vendor list rather than a retail box. SP6 uses server retention with heatsinks validated per TDP class, and the 8025P at 95 W needs a heatsink kit rated for that class in the intended chassis airflow. No cooler ships with the processor. Firmware power limits can cap draw below the default where a fanless or outdoor cabinet demands it, at some cost in sustained clocks.

Upgrade paths

On the same socket, the path up from the 8025P starts with the 16-core 8125P and the 24-core 8225P, all staying on SP6 boards with attention to their higher TDP classes. The 32-core 8325P and 48-core 8435P follow for denser consolidation on the same single-socket board where power and cooling allow. Each of these moves keeps board, memory and heatsink investments where the TDP class allows, plus a BIOS that already supports Sorano.

A move to SP8 is a different platform with 8 memory channels, PCIe 6.0 and higher power classes, aimed at mainstream enterprise racks rather than compact edge nodes. That change replaces board, memory population and cooling design from scratch. Buyers coming from older embedded or tower servers face the same full-platform refresh. The decision turns on whether the workload fits a small single-socket edge node or needs mainstream rack density, and the answer differs for remote gateways and for central virtualization hosts.