AMD EPYC 8435P socket: SP6

What the AMD EPYC 8435P is

The AMD EPYC 8435P is the 48-core mid-stack model of the EPYC 8005 Sorano family on Socket SP6. It runs 96 threads at 2.45 GHz base with boost to 4.5 GHz, backed by 256 MB of L3 cache and a 200 W default TDP. AMD announced Sorano in February 2026 and launched the stack in May 2026, building it on full Zen 5 cores with a 5nm process instead of the denser Zen 4c cores used in Siena.

Forty-eight cores at a 2.45 GHz base suit regional edge clouds, virtual desktop farms and backup storage heads where a single node must juggle many tenants at steady clocks. The 256 MB L3 pool matches the larger 64-core model, which keeps hit rates high for database caches and virtual machine images. At 200 W the part matches the old Siena power ceiling exactly, so boards built for top Siena models already know this thermal class.

Against the 64-core 8535P above it, the 8435P trims 16 cores and 10 W for sites that want the same 256 MB cache with lower draw. Against the 32-core 8325P below it, it adds half again as many cores for parallel tenants while giving up some base clock. No AMD 1Ku price is published on AMD pages for this model, so builders price it from board vendor quotes. The 8435P is the middle choice for mixed tenant hosts.

Socket and motherboard compatibility

The 8435P fits Socket SP6, a 4,844-contact land grid array that AMD built for EPYC 8004 Siena processors from 8 to 64 cores and EPYC 8005 Sorano processors from 8 to 84 cores. Every board is single-socket only, so one 8435P fills the socket and there is no second-socket upgrade to plan. SP6 boards are platform designs rather than desktop chipsets, so memory lists, heatsink kits and firmware all come from the board vendor. See Socket vs chipset: what decides whether a CPU works for how socket, platform and firmware fit together on server boards.

Sorano is a drop-in replacement on Siena boards after a BIOS update from the board maker, at the same power class. The 8435P at 200 W lands exactly on the Siena maximum, which makes it the simplest high-core swap for boards the vendor lists for Sorano. Memory on a converted board may stay at the Siena qualified speed rather than reaching DDR5-6400, so the vendor memory list governs the exact result. Moving from any other socket is a full platform change with board, memory and heatsinks replaced together.

Memory, PCIe and cooling

Each SP6 socket feeds 6 DDR5 channels with ECC RDIMM modules, and AMD rates Sorano to 6400 MT/s for up to 3 TB per socket. Six channels at these rates keep 96 threads supplied in mixed virtualization and file service mixes. Population order, maximum capacity and per-board speed caps vary, so the vendor memory list governs every build. Where a converted Siena board caps speeds lower, memory-heavy tenants feel the limit before compute-bound ones do.

PCI Express connectivity is Gen 5 with x96 lanes per socket, plus x8 Gen 3 lanes that carry board devices and slower slots. That lane budget feeds NVMe shelves, high-speed networking and timing cards on a single-socket edge board without lane sharing pressure. Lane bifurcation and CXL behavior follow board firmware, so architects confirm slot maps before committing to an expansion layout. CXL 2.0 memory expansion is part of the Sorano platform where the board wires it.

Cooling follows the board vendor list rather than a retail box. SP6 uses server retention with heatsinks validated per TDP class, and the 8435P at 200 W needs a heatsink kit rated for that class in the intended chassis airflow. No cooler ships with the processor. Firmware power limits can cap draw below the default where a power budget demands it, at some cost in sustained clocks.

Upgrade paths

On the same socket, the path up from the 8435P is the 64-core 8535P or the 84-core 8635P flagship, staying on SP6 boards with attention to their higher TDP classes. The path down is the 32-core 8325P or the 24-core 8225P where clock speed or power envelopes matter more than thread count. Edge sites can step per node without touching rack layout. Each of these moves keeps board, memory and heatsink investments where the TDP class allows.

A move to SP8 is a different platform with 8 memory channels, PCIe 6.0 and higher power classes, aimed at mainstream enterprise racks rather than compact edge nodes. That change replaces board, memory population and cooling design from scratch. Buyers coming from older tower or embedded servers face the same full-platform refresh. The decision turns on whether the workload fits a small single-socket edge node or needs mainstream rack density, and the answer differs for branch offices and for central clusters.