AMD EPYC 9336 socket: SP8

What the AMD EPYC 9336 is

The AMD EPYC 9336 is the 32-core entry model of the standard SP8 Venice stack. It runs 64 threads at 3.15 GHz base with boost to 3.7 GHz, backed by 128 MB of L3 cache and a 195 W default TDP that configures down to 130 W. AMD launched the EPYC 9006 family in July 2026 on the TSMC 2 nm process, with SP8 as the mainstream enterprise platform. The 9336 brings the Venice platform within reach of infrastructure, appliance and branch workloads that never needed a hundred cores.

Thirty-two cores at these clocks suit firewalls and network appliances, backup and storage controllers, build servers and lightly loaded virtualization hosts. Per-core software licensing often favors core counts like this one, since fewer fast cores cost less than many slower ones under such models. The 3.15 GHz base is the highest base clock among the standard SP8 core-density parts, which keeps single-threaded services responsive while 64 threads absorb background work.

At a 1Ku price of 3320 USD the 9336 is the most affordable standard SP8 part in this batch, well below the 48-core 9456. Against that chip it trades sixteen cores and half the L3 for a lower price and a 70 W lighter TDP. Against the frequency tuned 32-core F parts it trades boost ceiling for price and efficiency. Buyers who need SP8 platform features with modest compute start here.

Socket and motherboard compatibility

The 9336 fits Socket SP8, a 5572-contact land grid array covering EPYC 9006 Venice processors from 8 to 128 cores. AMD validates this standard model for single-socket and dual-socket boards, so the entry SKU scales from a compact 1P appliance to a 2P host with 128 threads. Board vendors qualify memory lists, heatsink kits and firmware per TDP class, and the 195 W rating with its 130 W floor is the easiest standard SP8 class to cool. See Socket vs chipset: what decides whether a CPU works for how socket, platform and firmware fit together on server boards.

A 2P build needs two matched 9336 processors with memory populated symmetrically across both sockets. A 1P build takes one processor in chassis that range from rack servers to compact edge designs the vendor qualifies. Migration from older SP5 Turin or SP6 Siena hardware is a full platform replacement of board, memory and cooling, since neither older socket accepts Venice silicon.

Memory, PCIe and cooling

Each SP8 socket feeds 8 DDR5 channels with two DIMMs per channel, using RDIMM, 3DS RDIMM or MRDIMM modules. AMD rates the platform to 8000 MT/s with RDIMM and 12800 MT/s with MRDIMM, giving up to 512 GB/s per socket with RDIMM and 819.2 GB/s with MRDIMM. Eight channels behind only 32 cores is lavish bandwidth per core, which flatters network packet processing and storage caching codes. Population order and capacity ceilings follow the board vendor list.

PCI Express connectivity is Gen 6 with x128 lanes per socket, generous for an entry node and enough to hang large NVMe sets and fast fabric off a 32-core host. Bifurcation tables and slot priorities live in board firmware, so appliance builders confirm the lane map before ordering. Gen 6 throughput per lane lets a modest processor drive I/O that once needed a flagship socket.

Cooling follows the board vendor list rather than a retail box. SP8 uses server retention with heatsinks validated per TDP class, and the 9336 at 195 W fits mainstream air-cooled designs with room to spare. No cooler ships with the processor. The configurable floor down to 130 W suits thermally constrained telco and edge chassis where the vendor qualifies that operating point.

Upgrade paths

On the same socket, the path up from the 9336 is the 48-core 9456 where thread count grows, or the frequency tuned 32-core F parts where boost clocks matter most, all staying on SP8 with the same memory and lane layout. The path further up reaches the 64-core 9526 and 9536 for consolidation hosts. Each step keeps board and memory investments where the TDP class allows, with heatsink ratings rechecked on the way to hotter classes.

A move to SP7 is a different platform with 16 memory channels and higher power classes for flagship cloud and HPC nodes. That change replaces board, memory population and cooling from scratch and overshoots entry needs by a wide margin. Buyers on SP5 Turin or SP6 Siena face the same full refresh. The 9336 is the on-ramp to SP8, and upgrades stay inside the socket until density demands otherwise.