VIA C7 2.0 socket: VIA NanoBGA2

What the C7 2.0 is

The VIA C7 2.0 is a 2000 MHz single-core soldered embedded processor from May 2005. It runs one Centaur Esther core at 2000 MHz with no turbo, so 1 core gives 1 thread. Cache is 128 KB of L2 with 128 KB of L1 on a 90 nm SOI process. Power is rated at 20 W max in a NanoBGA2 soldered package on an 800 MT/s bus with a 10x multiplier.

The top Esther clock closes the NanoBGA2 C7 line at 2 GHz, which is why the 2.0 carried flagship pricing over the 1.5 at launch. VIA launched the C7 2.0 on May 27, 2005. The chip supports MMX, SSE through SSE3, NX bit and PadLock with PowerSaver.

Peak Esther clocks with a 20 W envelope suit performance thin clients with DDR2 memory. The 800 MT/s V4 bus doubles the 1.5 path. That is why the C7 2.0 shipped in flagship fanless desktops.

Socket and motherboard compatibility

The C7 2.0 is soldered to NanoBGA2 boards and cannot be replaced. It fits embedded boards with NanoBGA2 solder lands and firmware that lists VIA C7 2.0. The Socket vs chipset: what decides whether a CPU works guide covers pairing rules.

Performance thin client boards are the natural match. Boards built for the C7 2.0 carry the soldered chip with a board spreader for the 20 W class.

Memory, PCIe and cooling

Memory is DDR2 through the board chipset, matched to the embedded board. The soldered CPU ties to the chipset over the 800 MT/s V4 bus. Thin boards commonly pair DDR2-533 pairs.

An 800 MT/s bus ties the soldered chip to the chipset, while expansion hangs off the chipset. Thermal design is board-level with a spreader for the 20 W class.

Upgrade paths

There is no CPU upgrade path from a soldered C7 2.0. The chip cannot move to a faster part. A board replacement with VIA Nano is the only move.

For socketed planning, a C7-M 795 such as VIA C7-M 795 is the Socket 479 twin at matching clocks with replacement allowed. The VIA NanoBGA2 page lists the range.