Intel Xeon 3.06 socket: Socket 604

What the Xeon 3.06 is

The Intel Xeon 3.06 is a 3.066 GHz single-core server processor with Hyper-Threading from March 2003. It runs one NetBurst Prestonia core at 3.066 GHz with no turbo, so 1 core gives 2 threads. Cache is 512 KB of L2 on a 130 nm process. The package is Socket 604 for dual-processor servers with DDR memory. This page omits a TDP rating because the Prestonia table entry for the 3.06 gives no power figure in opened sources, while nearby 2.8 GHz parts show 74 W with different clocks.

Prestonia covers Socket 603 and Socket 604 dual-processor parts with 400 MT/s and 533 MT/s buses, where B suffix models use Socket 604 with a 533 MT/s bus. The 3.06 uses a 533 MT/s front side bus with a 23x multiplier. The chip supports MMX, SSE, SSE2 and Hyper-Threading. Gallatin Xeon 3.06 parts share the model number with 1 MB or 2 MB of L3 cache at 97 W from July 2003, so codename separates Prestonia without L3 from Gallatin with L3. This page covers the Prestonia 533 MT/s part, since it matches the March 2003 89 W listing context without L3. Two Gallatin rows repeat the same model number with different L3 sizes, and those rows share the slug as duplicates needing human slugOverride for separate coverage.

Dual-processor scope with Hyper-Threading suited workgroup servers. Two 3.06 parts give four threads per chassis with shared memory, which helped threaded server tasks before dual-core designs. That is why Prestonia parts remained common after Gallatin added cache at higher prices.

Socket and motherboard compatibility

The Xeon 3.06 Prestonia fits Socket 604 dual-processor server boards with DDR memory and Prestonia BIOS support. It needs a two-socket board with 533 MT/s chipset paths. The Socket vs chipset: what decides whether a CPU works guide covers pairing rules.

Two-socket rack servers are the natural match. Boards listing Prestonia 533 MT/s parts accept the chip with server cooling. Gallatin 3.06 parts need Gallatin L3 cache paths despite sharing the model number.

Memory, PCIe and cooling

Memory is DDR through the server chipset with registered ECC modules. The CPU has no memory controller, so the chipset sets speed and capacity.

A 533 MT/s front side bus ties the CPUs to the chipset in a shared bus layout, while PCI-X slots hang off the chipset. No PCIe lanes originate on the die. Cooling uses vendor qualified server heatsinks per socket with strong chassis airflow. Both sockets need equal service.

Upgrade paths

On Socket 604 Prestonia steps include higher clocks where listed, while Gallatin 3.06 parts offer L3 cache as an alternative path on the same socket. Nocona parts on 90 nm offer 1 MB of L2 with 800 MT/s buses as successors. Beyond Socket 604 a move to LGA 771 needs new boards. The 3.06 lifts with the lever, so swaps need no solder work.