Intel Xeon E5-2695 v3 socket: LGA 2011-v3

The Intel Xeon E5-2695 v3 uses the LGA 2011-v3 socket. It is a fourteen core Haswell-EP server part with 28 threads from 2.3 GHz to 3.3 GHz at 120 W with 35 MB of cache.

Launched
September 2014
Cores and threads
14 and 28
Base power
120 W
Codename
Haswell-EP
Segment
Server
Clocks
2.3 / 3.3 GHz

Intel Xeon E5-2695 v3 specifications

Cores14
Threads28
Core architectureHaswell-EP cores on 22 nm
Clocks2.3 GHz base, up to 3.3 GHz turbo
Cache35 MB Smart Cache
Processor base power (TDP)120 W
Manufacturing process22 nm
Memory supportDDR4, four channels, ECC
PCI ExpressPCIe 3.0, 40 lanes
Integrated graphicsNone (server board graphics)
MultiplierLocked
PackageFCLGA2011-3

Motherboard and chipset compatibility

Intel Xeon E5-2695 v3 needs a motherboard with a LGA 2011-v3 socket. The table shows which chipset series accept it.

SeriesChipsetsSupport
C612 seriesC612Works out of the box

Board makers publish a CPU support list for every model. Check it for your exact board before buying. Chipset details for LGA 2011-v3.

LGA 2011-v3 at a glance

TypeLGA, 2,011 contacts
Package size52.5 × 45 mm
IntroducedAugust 2014
MemoryDDR4-2400, four channels, up to 128 GB
Cooler mounting holes80 × 80 mm

Read the full LGA 2011-v3 socket guide

What the Xeon E5-2695 v3 is

The Xeon E5-2695 v3 is an OEM Haswell-EP fourteen core for vendor clouds on LGA 2011-v3. Intel set fourteen cores and 28 threads at 2.3 GHz base with turbo to 3.3 GHz. Thirty five megabytes of Smart Cache serve dense guests. Power is 120 W on 22 nm from September 2014. Higher clocks than the 2683 v3 suit vendor tenants that need both density and response.

Fourteen cores consolidate virtual machines per socket at strong ratios. Turbo to 3.3 GHz lifts control tasks while base holds all core work. Large cache covers many tenants. ECC DDR4 protects data. No integrated graphics exist. Fabric and NVMe storage shape throughput. Used buyers find this SKU in vendor pulls.

DDR4 ECC over four channels feeds each socket with two QPI links between dual nodes. The mix is a server socket for vendor clouds where fast fourteen cores at 120 W are wanted.

Socket and motherboard compatibility

The E5-2695 v3 fits LGA 2011-v3 on vendor C612 Grantley platforms. OEM validation may block generic boards. Confirm the system matrix before purchase. X99 desktop never accepts this OEM server part.

ECC RDIMMs over four channels carry memory. The Socket vs chipset: what decides whether a CPU works guide is desktop focused, so follow vendor rules. Cooling uses vendor 120 W heatsinks with rack airflow.

Retail high core E5 v3 offer broader support where OEM locks bind. Verify microcode first.

Memory, PCIe and cooling

DDR4 ECC quad channel per socket suits dense virtualization. Even maps protect NUMA balance. Large RDIMMs reach high counts. Speed follows population per manual.

Forty PCIe lanes per socket feed fabric HBAs and NVMe. NUMA placement across QPI links matters at fourteen cores. Vendor manuals detail slots.

Vendor 120 W cooling handles sustained loads with cool inlets. No retail cooler exists. Turbo residency follows per core states.

Upgrade paths

Within the socket the Intel Xeon E5-2683 v3 with fourteen cores is a slightly slower OEM twin on vendor systems. The Intel Xeon E5-2698 v3 with sixteen cores is a higher density retail step. Both need platform checks.

Newer sockets replace Grantley. The E5-2695 v3 covers OEM clouds where fast fourteen cores at 120 W are the pick.

Frequently asked questions

What socket does the Xeon E5-2695 v3 use?

It uses LGA 2011-v3 on vendor C612 systems.

How many cores does the Xeon E5-2695 v3 have?

Fourteen cores and 28 threads at 2.3 GHz base with turbo to 3.3 GHz.

How much cache does the Xeon E5-2695 v3 have?

35 MB of Smart Cache.

What is the TDP of the Xeon E5-2695 v3?

120 W as an OEM vendor part.

Sources and verification

  1. List of Intel Xeon processors Haswell-based (Wikipedia, E5-2695 v3 data)
  2. Haswell microarchitecture (Wikipedia, Haswell-EP data)

Facts last checked against these sources on . Page last edited on .