Intel Pentium II Xeon 450 2MB socket: Slot 2
The Intel Pentium II Xeon 450 2MB uses the Slot 2 slot. It is a 46.7 W single-core Drake server part at 450 MHz with 2 MB of L2 cache for early Slot 2 quad servers.
- Socket
- Slot 2
- Launched
- January 5, 1999
- Cores and threads
- 1 and 1
- Base power
- 46.7 W
- Codename
- Drake
- Segment
- Server
- Family
- Intel Pentium II Xeon
- Clocks
- 0.45 GHz
Intel Pentium II Xeon 450 2MB specifications
| Cores | 1 |
|---|---|
| Threads | 1 |
| Core architecture | Drake (P6) |
| Clocks | 450 MHz base, no turbo |
| Cache | 32 KB L1, 2 MB full-speed L2 |
| Processor base power (TDP) | 46.7 W |
| Manufacturing process | 250 nm |
| Memory support | Registered EDO DRAM and SDRAM through the server chipset |
| Front side bus | 100 MT/s |
| Package | Slot 2 (SECC cartridge, 330 contacts) |
| Multiplier | Locked (4.5x) |
| Integrated graphics | None |
Motherboard compatibility
Intel Pentium II Xeon 450 2MB needs a motherboard with a Slot 2 socket. Chipset by chipset data for this codename is not recorded yet. See the Slot 2 chipset list and the board maker's CPU support list.
Slot 2 at a glance
| Type | Slot, 330 contacts |
|---|---|
| Package size | n/a |
| Introduced | April 1998 |
| Memory | Registered SDRAM through the board chipset |
| Cooler mounting holes | Cartridge and retention cage |
What the Pentium II Xeon 450 2MB is
The Intel Pentium II Xeon 450 2MB is a 450 MHz single-core server processor from January 1999. It runs one P6 Drake core at 450 MHz with no Hyper-Threading, so 1 core gives 1 thread. Cache is 2 MB of L2 at full CPU speed with 32 KB of L1 on a 250 nm process. Power is rated at 46.7 W in a Slot 2 SECC cartridge on a 100 MT/s front side bus with a 4.5x multiplier at 2.0 V.
The 2 MB full-speed cache doubles the 1 MB option at matching clocks and power class, which is why the 2MB string suits large database servers with big working sets. Intel launched the 450 2MB on January 5, 1999 at $3692. The chip supports MMX and four-way SMP.
Mid Drake clocks with a large cache suit early Slot 2 quad servers with registered EDO memory. The heavy SECC cartridge needs the full retention cage. That is why the 450 2MB shipped in enterprise database boxes.
Socket and motherboard compatibility
The 450 2MB fits Slot 2 enterprise servers with Drake support. It needs a 330-lead SC330 board with a 100 MT/s bus and a BIOS that lists the 2MB Xeon 450. The Socket vs chipset: what decides whether a CPU works guide covers pairing rules.
Enterprise quad servers are the natural match. Boards listing the 2MB string accept up to four cartridges with 46.7 W heatsinks each.
Memory, PCIe and cooling
Memory is registered EDO DRAM and SDRAM through the server chipset, matched to the board sockets. The cartridge has no memory controller. Enterprise boards commonly run ECC pairs.
A 100 MT/s front side bus ties each cartridge to the chipset, while PCI hangs off the chipset. No PCIe lanes originate on the cartridge. Cooling uses SECC heatsinks on the retention cage with server airflow.
Upgrade paths
On the same slot, a Pentium II Xeon 450 1MB on the same support list halves cache to 1 MB at 42.8 W for a small power saving. A Pentium III Xeon 500 with 512 KB on 180 nm moves the line forward when the board lists Cascades strings.
A move to Pentium III Xeon Tanner keeps the slot with SSE paths. The Slot 2 page lists the Drake to Cascades range for planning. Note: the queue row lists 47 W; this page uses the verified 46.7 W.
Frequently asked questions
What socket does the Pentium II Xeon 450 2MB use?
Slot 2 in a SECC cartridge with 330 contacts. It is a 46.7 W Drake server part at 450 MHz with 2 MB of cache.
What memory does the 450 2MB use?
Registered EDO DRAM and SDRAM through the server chipset.
What is the upgrade path from the 450 2MB?
A 450 1MB on the same support list halves cache at 42.8 W. A move to Pentium III Xeon adds SSE.
Sources and verification
- List of Intel Xeon processors P6-based Drake 450 2MB 46.7W (Wikipedia)
- Slot 2 SC330 server slot (Wikipedia)
- Pentium III Xeon datasheet SC330 cartridge (Intel)
Facts last checked against these sources on . Page last edited on .