Intel Pentium II Xeon 400 1MB socket: Slot 2

What the Pentium II Xeon 400 1MB is

The Intel Pentium II Xeon 400 1MB is a 400 MHz single-core server processor from June 1998. It runs one P6 Drake core at 400 MHz with no Hyper-Threading, so 1 core gives 1 thread. Cache is 1 MB of L2 at full CPU speed with 32 KB of L1 on a 250 nm process. Power is rated at 38.1 W in a Slot 2 SECC cartridge on a 100 MT/s front side bus with a 4x multiplier at 2.0 V.

Double cache over the 512 KB base at matching clocks gives the 1MB string room for larger databases, which is why it headed launch-era database servers. Intel launched the 400 1MB on June 29, 1998 at $2836. The chip supports MMX and four-way SMP.

Launch clocks with a large cache suit first Slot 2 servers with registered memory. The 4x integer ratio is clean for 100 MT/s boards. That is why the 400 1MB shipped in launch database boxes.

Socket and motherboard compatibility

The 400 1MB fits Slot 2 launch servers with Drake support. It needs a 330-lead SC330 board with a 100 MT/s bus and a BIOS that lists the 1MB Xeon 400. The Socket vs chipset: what decides whether a CPU works guide covers pairing rules.

Launch database servers are the natural match. Boards listing the 1MB string accept cartridges with 38.1 W heatsinks each.

Memory, PCIe and cooling

Memory is registered EDO DRAM and SDRAM through the server chipset, matched to the board sockets. The cartridge has no memory controller. Launch boards commonly run ECC pairs.

A 100 MT/s front side bus ties each cartridge to the chipset, while PCI hangs off the chipset. No PCIe lanes originate on the cartridge. Cooling uses SECC heatsinks on the retention cage.

Upgrade paths

On the same slot, a plain Pentium II Xeon 400 such as Intel Pentium II Xeon 400 halves cache to 512 KB at 30.8 W for a power saving. A 450 MHz Drake on the same list adds clocks.

A move to Tanner Xeon adds SSE paths. The Slot 2 page lists the range. Note: the queue row lists 38 W; this page uses the verified 38.1 W.