AMD EPYC 4585PX socket: AM5

What the AMD EPYC 4585PX is

The AMD EPYC 4585PX is the cache-stacked 16-core member of the EPYC 4005 Grado stack on Socket AM5. It runs 32 threads at 4.3 GHz base with boost to 5.7 GHz, backed by 128 MB of total L3 cache and a 170 W default TDP. AMD launched the EPYC 4005 series on May 13, 2025 at a 1Ku price of 699 USD, building Grado on the same Zen 5 chiplets as Granite Ridge desktops with 3D V-Cache on one CCD.

Stacked cache sets the 4585PX apart from the plain 16-core parts. One CCD carries 64 MB of 3D V-Cache above its 32 MB of on-die cache for 96 MB on that die, while the second CCD contributes a standard 32 MB, giving 128 MB in total. Database, EDA and simulation threads with large working sets hit cache more often and reach DRAM less, which lifts throughput where the data fits the stack.

Against the plain 16-core AMD EPYC 4565P beside it, the 4585PX trades price for cache depth at identical clocks and power. Against the 65 W 16-core AMD EPYC 4545P below it, the 4585PX adds frequency and cache for latency-sensitive hosts. The AM5 socket keeps board costs near desktop levels while adding ECC and RAIDXpert2. See Socket vs chipset: what decides whether a CPU works for how socket, platform and firmware fit together on AM5 server boards.

Socket and motherboard compatibility

The 4585PX fits Socket AM5, a 1,718-contact land grid array shared with Ryzen 7000 Raphael and Ryzen 9000 Granite Ridge desktops such as the AMD Ryzen 9 9950X. Every Grado board is single-socket only, so one 4585PX fills the socket and there is no second-socket upgrade to plan. Server AM5 boards add ECC validation, BMC management and RAIDXpert2 on top of the desktop socket, so board choice follows the server vendor CPU list at 170 W.

Grado uses the same AM5 socket as the EPYC 4004 Raphael range, so many AM5 server boards take the 4585PX after a BIOS update from the board maker. A 4585PX at 170 W needs power delivery and cooling rated for that class, which 65 W-only boards cannot provide. The stacked cache needs no special socket wiring, only firmware that knows the X SKU. Moving from any other socket is a full platform change with board, memory and heatsinks replaced together.

Memory, PCIe and cooling

Each AM5 socket feeds 2 DDR5 channels with ECC UDIMM or RDIMM support, and AMD rates Grado to 5600 MT/s for up to 192 GB per socket. Two channels at these rates keep 32 threads supplied in database and simulation mixes where the stacked cache absorbs much of the pressure. Population order and maximum capacity vary by board, so the vendor memory list governs every build, and ECC should stay enabled for business data.

PCI Express connectivity is Gen 5 with x28 lanes from the CPU, rising to x44 with the board chipset for slower slots and devices. That lane budget feeds NVMe arrays plus 10 and 25-gigabit networking on a cache-heavy entry server without strain. Lane splits between graphics, NVMe and expansion slots follow the board block diagram, so architects confirm slot maps before adding cards.

Cooling uses standard AM5 retention at 54 × 90 mm with the fixed AM5 backplate, and the 4585PX at 170 W needs a tower air cooler or 2U server heatsink rated for that class. No cooler ships with the boxed server part in most channels. Firmware power limits can cap draw below the default where thermals demand it, at some cost in sustained clocks.

Upgrade paths

On the same socket, the plain 16-core AMD EPYC 4565P beside the 4585PX keeps identical clocks at a lower price where the working set fits 64 MB of L3. The 65 W 16-core AMD EPYC 4545P below it keeps the same cores at lower clocks for cooler chassis. Each option stays on AM5 server boards where the power class allows, plus a BIOS that already supports Grado.

A move to SP5 Turin is a different platform with 12 memory channels and 128 PCIe lanes, aimed at dense racks rather than entry towers. That change replaces board, memory population and cooling design from scratch. The decision turns on whether cache depth on one tower beats memory channels across a rack.