Intel Pentium III Xeon 700-2M 5V-12V socket: Slot 2
The Intel Pentium III Xeon 700-2M 5V-12V uses the Slot 2 slot. It is a 29.6 W single-core Cascades-2M server part at 700 MHz with 2 MB of full-speed L2 cache for Slot 2 boards with 5V-12V regulation.
- Socket
- Slot 2
- Launched
- May 22, 2000
- Cores and threads
- 1 and 1
- Base power
- 29.6 W
- Codename
- Cascades-2M
- Segment
- Server
- Family
- Intel Pentium III Xeon
- Clocks
- 0.7 GHz
Intel Pentium III Xeon 700-2M 5V-12V specifications
| Cores | 1 |
|---|---|
| Threads | 1 |
| Core architecture | Cascades-2M (P6) |
| Clocks | 700 MHz base, no turbo |
| Cache | 32 KB L1, 2 MB full-speed ECC L2 |
| Processor base power (TDP) | 29.6 W |
| Manufacturing process | 180 nm |
| Memory support | Registered ECC SDRAM through the server chipset |
| Front side bus | 100 MT/s |
| Package | Slot 2 (SECC cartridge, 330 contacts) |
| Multiplier | Locked (7x) |
| Integrated graphics | None |
Motherboard compatibility
Intel Pentium III Xeon 700-2M 5V-12V needs a motherboard with a Slot 2 socket. Chipset by chipset data for this codename is not recorded yet. See the Slot 2 chipset list and the board maker's CPU support list.
Slot 2 at a glance
| Type | Slot, 330 contacts |
|---|---|
| Package size | n/a |
| Introduced | April 1998 |
| Memory | Registered SDRAM through the board chipset |
| Cooler mounting holes | Cartridge and retention cage |
What the Pentium III Xeon 700-2M 5V-12V is
The Intel Pentium III Xeon 700-2M 5V-12V is a 700 MHz single-core server processor from May 2000. It runs one P6 Cascades core at 700 MHz with no Hyper-Threading, so 1 core gives 1 thread. Cache is 2 MB of full-speed ECC L2 with 32 KB of L1 on a 180 nm process. Power is rated at 29.6 W in a Slot 2 SECC cartridge on a 100 MT/s front side bus with a 7x multiplier on the 5V-12V regulator path.
The 2 MB full-speed cache doubles the 1 MB option at matching clocks and power, which is why the 2M string suits database servers with large working sets. Intel launched 700 MHz Xeon parts in 1 MB and 2 MB options on May 22, 2000. The chip supports MMX, SSE and four-way SMP.
Mid server clocks with a large ECC cache suit Slot 2 database boards with registered SDRAM. The 7x integer ratio is clean for 100 MT/s boards. That is why the 700-2M shipped in quad-capable database boxes.
Socket and motherboard compatibility
The 700-2M 5V-12V fits Slot 2 servers wired for 5V-12V regulation. It needs a 330-lead SC330 board with a 100 MT/s bus and a BIOS that lists the 5V-12V 700-2M string. The Socket vs chipset: what decides whether a CPU works guide covers pairing rules.
Database rack servers are the natural match. Boards listing the 5V-12V string accept cartridges with 29.6 W heatsinks each.
Memory, PCIe and cooling
Memory is registered ECC SDRAM through the server chipset, matched to the board sockets. The cartridge has no memory controller. Database boards commonly interleave ECC pairs.
A 100 MT/s front side bus ties each cartridge to the chipset, while PCI hangs off the chipset. No PCIe lanes originate on the cartridge. Cooling uses SECC heatsinks on the retention cage.
Upgrade paths
On the same slot, a move to a Pentium III Xeon 700-2M 2.8V such as Intel Pentium III Xeon 700-2M 2.8V keeps clocks and cache while changing regulator path. A Xeon 700 5V-12V with 1 MB on the same list trims cache at equal power.
A move to Foster Xeon needs Socket 603. The Slot 2 page lists the range. Note: the queue row lists 30 W; this page uses the verified 29.6 W shared by both cache options.
Frequently asked questions
What socket does the Pentium III Xeon 700-2M 5V-12V use?
Slot 2. It is a 29.6 W Cascades-2M server part at 700 MHz with 2 MB of cache in the 5V-12V variant.
What memory does the 700-2M 5V-12V use?
Registered ECC SDRAM through the server chipset.
What is the upgrade path from the 700-2M 5V-12V?
A 700-2M 2.8V on boards wired for that regulator.
Sources and verification
- List of Intel Xeon processors 700 1MB 2MB 29.6W (Wikipedia)
- Slot 2 SC330 (Wikipedia)
- Pentium III Xeon datasheet SC330 (Intel)
Facts last checked against these sources on . Page last edited on .